MemTracker: Efficient and programmable support for memory access monitoring and debugging

被引:0
|
作者
Venkataramani, Guru [1 ]
Roemer, Brandyn [1 ]
Solihin, Yan [2 ]
Prvulovic, Milos [1 ]
机构
[1] Georgia Tech, Atlanta, GA USA
[2] North Calif State Univ, Raleigh, NC USA
基金
美国国家科学基金会;
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortunately, existing software and even hardware approaches for finding and identifying memory bugs have considerable performance overheads, target only a narrow class of bugs, are costly to implement, or use computational resources inefficiently. This paper describes MemTracker, a new hardware support mechanism that can be configured to perform different kinds of memory access monitoring tasks. MemTracker associates each word of data in memory with a few bits of state, and uses a programmable state transition table to react to different events that can affect this state. The number of state bits per word, the events to which MemTracker reacts, and the transition table are all fully programmable. MemTracker's rich set of states, events, and transitions can be used to implement different monitoring and debugging checkers with minimal performance overheads, even when frequent state updates are needed. To evaluate MemTracker, we map three different checkers onto it, as well as a checker that combines all three. For the most demanding (combined) checker, we observe performance overheads of only 2.7% on average and 4.8% worst-case on SPEC 2000 applications. Such low overheads allow continuous (always-on) use of MemTracker-enabled checkers even in production runs.
引用
收藏
页码:273 / +
页数:2
相关论文
共 50 条
  • [21] Ordered Access Memory Based Programmable Hardware Accelerator Parallel Architecture
    Melnyk, Anatoliy
    Melnyk, Viktor
    2019 IEEE 15TH INTERNATIONAL CONFERENCE ON THE EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS (CADSM'2019), 2019,
  • [22] Electrical programmable multilevel nonvolatile photonic random-access memory
    Meng, Jiawei
    Gui, Yaliang
    Nouri, Behrouz Movahhed
    Ma, Xiaoxuan
    Zhang, Yifei
    Popescu, Cosmin-Constantin
    Kang, Myungkoo
    Miscuglio, Mario
    Peserico, Nicola
    Richardson, Kathleen
    Hu, Juejun
    Dalir, Hamed
    Sorger, Volker J.
    LIGHT-SCIENCE & APPLICATIONS, 2023, 12 (01)
  • [23] Electrical programmable multilevel nonvolatile photonic random-access memory
    Jiawei Meng
    Yaliang Gui
    Behrouz Movahhed Nouri
    Xiaoxuan Ma
    Yifei Zhang
    Cosmin-Constantin Popescu
    Myungkoo Kang
    Mario Miscuglio
    Nicola Peserico
    Kathleen Richardson
    Juejun Hu
    Hamed Dalir
    Volker J. Sorger
    Light: Science & Applications, 12
  • [24] Memory efficient programmable processor chip for inverse Haar transform
    Departamento de Electronica y, Computadores, Santander, Spain
    IEEE Trans Signal Process, 1 (263-268):
  • [25] Memory efficient programmable processor chip for inverse Haar transform
    Ruiz, GA
    Michell, JA
    IEEE TRANSACTIONS ON SIGNAL PROCESSING, 1998, 46 (01) : 263 - 268
  • [26] Efficient and Secure Access Control System Based on Programmable Smart Cards
    Malina, Lukas
    Benes, Vlastimil
    Hajny, Jan
    Dzurenda, Petr
    2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP), 2017, : 32 - 36
  • [27] A Novel Efficient Quantum Random Access Memory
    Zidan, Mohammed
    Abdel-Aty, Abdel-Haleem
    Khalil, Ashraf
    Abdel-Aty, Mahmoud
    Eleuch, Hichem
    IEEE ACCESS, 2021, 9 : 151775 - 151780
  • [28] Systems for monitoring the access for efficient control at enterprise
    Anon
    Gazovaya Promyshlennost, 2001, (05): : 4 - 10
  • [29] Systems for monitoring the access for efficient control at enterprise
    Bezopasnost' Truda v Promyshlennosti, 2001, (11): : 62 - 64
  • [30] A memory management approach for efficient implementation of multimedia kernels on programmable architectures
    Dasigenis, M
    Kroupis, N
    Argyriou, A
    Tatas, K
    Soudris, D
    Thanailakis, A
    Zervas, N
    IEEE COMPUTER SOCIETY WORKSHOP ON VLSI 2001, PROCEEDINGS, 2001, : 171 - 176