Tunnel field effect transistor with increased ON current, low-k spacer and high-k dielectric

被引:112
|
作者
Anghel, Costin [1 ]
Chilagani, Prathyusha [1 ]
Amara, Amara [1 ]
Vladimirescu, Andrei [1 ]
机构
[1] ISEP, F-75270 Paris, France
关键词
field effect transistors; high-k dielectric thin films; low-k dielectric thin films; tunnelling;
D O I
10.1063/1.3367880
中图分类号
O59 [应用物理学];
学科分类号
摘要
An improved double-gate tunnel field-effect transistor structure with superior performance is proposed. The originality consists in the introduction of a low-k spacer that is combined with a high-k gate dielectric. Numerical simulations demonstrate that the use of the low-k spacer and high-k gate dielectric leads to a high on-current, I(ON), and reduced subthreshold slope. The proposed structure increases I(ON) by a factor of 3.8 and reduces the subthreshold slope by a factor of 2 compared to other structures described in literature.
引用
收藏
页数:3
相关论文
共 50 条
  • [41] High-k and low-k nanocomposite gate dielectrics for low voltage organic thin film transistors
    Kim, Chang Su
    Jo, Sung Jin
    Lee, Sung Won
    Kim, Woo Jin
    Baik, Hong Koo
    Lee, Se Jong
    Hwang, D. K.
    Im, Seongil
    APPLIED PHYSICS LETTERS, 2006, 88 (24)
  • [42] ON HIGH-K DIELECTRIC CAVITIES
    SCHLICKE, HM
    PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1952, 40 (02): : 224 - 224
  • [43] Solution processable nanoparticles as high-k dielectric for organic field effect transistors
    Ahmadi, Mahshid
    Phonthammachai, Nopphawan
    Shuan, Tan Huei
    White, Timothy J.
    Mathews, Nripan
    Mhaisalkar, Subodh G.
    ORGANIC ELECTRONICS, 2010, 11 (10) : 1660 - 1667
  • [44] Heavy-Ion Irradiation effect in Trigate SOI Tunnel FETs with high-k Spacer Technology
    Pradhan, K. P.
    Sahu, P. K.
    Mallikarjunarao
    PROCEEDINGS OF THE 2016 IEEE REGION 10 CONFERENCE (TENCON), 2016, : 2373 - 2376
  • [45] Influence of sidewall spacer on threshold voltage of MOSFET with high-k gate dielectric
    Xu, J. P.
    Ji, F.
    Lai, P. T.
    Guan, J. G.
    MICROELECTRONICS RELIABILITY, 2008, 48 (02) : 181 - 186
  • [46] Design optimization of high breakdown voltage vertical GaN junction barrier Schottky diode with high-K/low-K compound dielectric structure
    田魁元
    刘勇
    杜江锋
    于奇
    Chinese Physics B, 2023, (01) : 539 - 546
  • [47] Design optimization of high breakdown voltage vertical GaN junction barrier Schottky diode with high-K/low-K compound dielectric structure
    Tian, Kuiyuan
    Liu, Yong
    Du, Jiangfeng
    Yu, Qi
    CHINESE PHYSICS B, 2023, 32 (01)
  • [48] Device physics and design of hetero-gate dielectric tunnel field-effect transistors with different low/high-k EOT ratios
    Chun-Hsing Shih
    Nguyen Dang Chien
    Huy-Duy Tran
    Phan Van Chuan
    Applied Physics A, 2020, 126
  • [49] Device physics and design of hetero-gate dielectric tunnel field-effect transistors with different low/high-k EOT ratios
    Shih, Chun-Hsing
    Nguyen Dang Chien
    Huy-Duy Tran
    Phan Van Chuan
    APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2020, 126 (01):
  • [50] Performance Analysis Of Carbon Nanotube Field Effect Transistor With High K Dielectric
    Chacko, Anoob Eapen
    Nesamani, Flavia Princess
    Sujith, I.
    Divakaran, M. B. Rekha
    Prabha, V. Lakshmi
    2014 INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS), 2014,