A low-power full-band 802.11abg CMOS transceiver with on-chip PA

被引:0
|
作者
Yen, Shih-Chieh [1 ]
Lin, Ying-Yao [1 ]
Chen, Tzung-Ming [1 ]
Chiu, Yung-Ming [1 ]
Chang, Bin-, I [1 ]
Chan, Ka-Un [1 ]
Lin, Ying-Hsi [1 ]
Huang, Ming-Chong [1 ]
Huang, Jiun-Zen [1 ]
Lu, Chao-Hua [1 ]
Wang, Wen-Shan [1 ]
Hu, Che-Sheng [1 ]
Lee, Chao-Cheng [1 ]
机构
[1] Realtek Semicond Corp, Hsinchu 300, Taiwan
关键词
transceivers; on-chip PA; I/Q calibration; temperature detect; power detect;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low-power full-band 802.11abg transceiver in 0.15 mu m CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm Output P-1dB- -40 to 140 degrees C operation temperature is achieved by sensing technique. Onchip power detector and transmitter to receiver feedback loop estimate the I/Q imbalance, and a new I/Q compensation scheme is implemented in LO (local oscillator) rather than signal paths. It consumes 65/75mA for 2.4/5GHz receive modes and 200/107mA for 2.4/5GHz transmit modes respectively. The low power consumption, high integration and robustness make this transceiver suitable for portable applications.
引用
收藏
页码:85 / 88
页数:4
相关论文
共 50 条
  • [41] A low-power FSK modulator/demodulator for an MICS band transceiver
    Tekin, A
    Yuce, MR
    Shabani, J
    Liu, WT
    2006 IEEE RADIO AND WIRELESS SYMPOSIUM, PROCEEDINGS, 2006, : 159 - 162
  • [42] Low-voltage low-power CMOS full adder
    Radhakrishnan, D
    IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 2001, 148 (01): : 19 - 24
  • [43] Efficiency Assessment of Traditional GaAs and Low-Power InGaAs Schottky Diodes in Full-Band Mixers at 0.3 THz
    Gil, Javier Martinez
    Moro-Melgar, Diego
    Negrus, Artur
    Oprea, Ion
    Cojocari, Oleg
    ELECTRONICS, 2023, 12 (21)
  • [44] An Ultra Low-Power CMOS Transceiver Using Various Low-Power Techniques for LR-WPAN Applications
    Kwon, Yong-Il
    Park, Sang-Gyu
    Park, Ta-Joon
    Cho, Koon-Shik
    Lee, Hai-Young
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (02) : 324 - 336
  • [45] A low-power CMOS readout IC with on-chip column-parallel SAR ADCs for microbolometer applications
    Shafique, Atia
    Ceylan, Omer
    Yazici, Melik
    Kaynak, Mehmet
    Gurbuz, Yasar
    INFRARED TECHNOLOGY AND APPLICATIONS XLIV, 2018, 10624
  • [46] An on-chip interpolation based readout scheme for low-power, high-speed CMOS image sensors
    Kaur, Amandeep
    Mishra, Deepak
    Sarkar, Mukul
    2018 IEEE SENSORS, 2018, : 633 - 636
  • [47] A Low-Latency and Low-Power Hybrid Scheme for On-Chip Networks
    Jiang, Guoyue
    Li, Zhaolin
    Wang, Fang
    Wei, Shaojun
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 23 (04) : 664 - 677
  • [48] A Fully Integrated Reconfigurable Low-Power Sub-GHz Transceiver for 802.11ah in 65nm CMOS
    Wei, Meng
    Song, Zheng
    Li, Peiyi
    Lin, Jianfu
    Zhang, Junfeng
    Hao, Jiachen
    Chi, Baoyong
    2017 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC), 2017, : 240 - 243
  • [49] A quad-band low power single chip direct conversion CMOS transceiver with ΣΔ-modulation loop for GSM
    Götz, E
    Kröbel, H
    Märzinger, G
    Memmler, B
    Münker, C
    Neurauter, B
    Römer, D
    Rubach, J
    Schelmbauer, W
    Scholz, M
    Simon, M
    Steinacker, U
    Stöger, C
    ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2003, : 217 - 220
  • [50] Low-Power CMOS Transceiver Circuits for 60GHz Band Millimeter-wave Impulse Radio
    Oncu, Ahmet
    Fujishima, Minoru
    PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009, 2009, : 99 - 100