A study of deadbeat control for three phase PWM inverter using FPGA based hardware controller

被引:5
|
作者
Ide, T [1 ]
Yokoyama, T [1 ]
机构
[1] Tokyo Denki Univ, Saitama, Japan
关键词
D O I
10.1109/PESC.2004.1355712
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new method for the real-time digital feedback control for three phase PWM inverter is proposed, in which realizes a deadbeat control using FPGA based hardware controller. In recent years, large-scale and high-speed FPGAs make it possible to realize complicated control calculation with very high speed execution time. Calculation time for FPGA depends on the circuit design, especially how to construct the parallel processing circuit in the chip. Moreover, the latest FPGA contain embedded RAM, CPU core, DSP block, and it is possible to design a highspeed calculation circuit simply. Up to now, the digital feedback inverter control constructed by the software controller using DSP, DSP software is treated as a sequential process, so some calculation time is necessary. Since the finite time is required for the control calculation after measuring signals, it is impossible to realize the control law which use the k's sampling data to the k's control output. On the other hand, using FPGA based hardware controller, parallel processing can be realized. As the result, FPGA based control system makes it possible to realize the digital control system with negligible sampling delay and calculation time delay. In this paper, an instantaneous deadbeat control for three phase PWM inverter using FPGA based hardware controller is proposed. All the control calculation block, AD interface block and pulse pattern generation block are implemented in one FPGA chip. The characteristics of the proposed control method were verified through simulations and experiments. Design concept of the experimental system is also proposed.
引用
收藏
页码:50 / 53
页数:4
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