4.2 GHz 0.81 mW triple-modulus prescaler based on true single-phase clock

被引：6
|
作者：
Jiang, Wenjian [1 ,2 ,3 ]
Yu, Fengqi [1 ,2 ,3 ]
机构：
[1] Chinese Acad Sci, Shenzhen Inst Adv Technol, Shenzhen 518055, Peoples R China
[2] Univ Chinese Acad Sci, Beijing, Peoples R China
[3] Chinese Acad Sci, Inst Microelect, Beijing, Peoples R China
来源：
ELECTRONICS LETTERS | 2016年 / 52卷 / 12期
关键词：
ultrasonic transducers; ultrasonic imaging; finite element analysis; biomedical ultrasonics; frequency; 40; MHz; gain-6; dB; FEM simulation; PZT-5H; PMN-PT; finite element method; IVUS transducer; high-frequency intravascular ultrasound transducer; modified inversion layer technique; intravascular ultrasound imaging; DESIGN;
D O I：
10.1049/el.2016.0672
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A dual-modulus prescaler based on true single-phase clock D flip-flop is presented. Instead of using the conventional digital logic circuit, the pass transistor logic circuit is applied to reduce the number of the transistors and the power of the divider. By adding only two additional transistors, a dual-modulus operation is achieved. Implemented in a standard 180 nm CMOS process, the proposed divide-by 6/7/8 prescaler based on the proposed dual-modulus one achieves an operating frequency of 4.2 GHz with a measured power consumption of 0.81 mW for a 1.2 V supply.
引用
收藏
页码：1007 / +
页数：2
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