FPGA-Based Digital Control Implementation of Unbalance Compensation in Three-phase Three-wire Stand-alone Inverters

被引:0
|
作者
Lakshmanan, Padmavathi [1 ,2 ]
Janakiraman, P. A. [3 ]
Ram, Subhash Kumar [1 ,2 ]
Abhishek, Anand [1 ,2 ]
机构
[1] CSIR Cent Elect Engn Res Inst, Pilani 333031, Rajasthan, India
[2] Acad Sci & Innovat Res Ghaziabad, Ghaziabad 201002, Uttar Pradesh, India
[3] Indian Inst Technol Madras, Chennai 600036, Tamil Nadu, India
关键词
unbalance compensation; three-phase three-wire inverters; FPGA; digital control; PWM; STATIONARY-REFERENCE-FRAME; VOLTAGE-SOURCE; DESIGN; SYSTEMS;
D O I
10.1109/PIICON56320.2022.10045260
中图分类号
X [环境科学、安全科学];
学科分类号
08 ; 0830 ;
摘要
This paper presents an FPGA-controlled three-phase inverter programmed for unbalance compensation in the output voltage of the three-phase inverter. The inverter output voltage becomes unbalanced because of the unbalanced load currents drawn by the unbalanced lads of the inverter. The unbalance compensation method mainly uses fundamental harmonic observers, which are designed to decompose a highly distorted voltage and current signal. These observers are embedded into the FPGA. FPGA is used along with other PWM-type controllers and input-output interfaces. The three-phase inverter fundamental output voltage is regulated by using a feedback control system, and a decoupled channel control mechanism has been employed to perform unbalance compensation. Two Cyclone FPGA chip implements the various signal processing steps in the closed loop inverter control methods.
引用
收藏
页数:5
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