Phase locked loop robustness improvement using non integer order loop filter

被引：0
|
作者：
Lagareste, V. [1 ]
Badets, F.
Melchior, P.
Begueret, J. B.
Deval, Y.
Oustaloup, A.
Belot, D.
机构：
[1] Univ Bordeaux 1, LAPS Lab, CRONE Team, Bordeaux, France
[2] Univ Bordeaux 1, IXL Lab, RF Design Team, Bordeaux, France
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents how non integer order filters can be used in Phase Locked Loop (PLL) based frequency synthesizers in order to increase their stability robustness. Application to a 192MHz PLL involved in a 3.6GHz multimode double loop frequency synthesizer is described.
引用
收藏
页码：3217 / 3220
页数：4
相关论文
共 50 条
  • [1] Design and performance study of phase-locked loop using fractional-order loop filter
    Tripathy, Madhab Chandra
    Mondal, Debasmita
    Biswas, Karabi
    Sen, Siddhartha
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2015, 43 (06) : 776 - 792
  • [2] Improvement of the Carrier Phase Based on Vector Frequency Locked Loop with the Phase Locked Loop assisted
    Tang, Zhenran
    Tang, Xiaomei
    Lin, Honglei
    Wang, Feixue
    2019 4TH INTERNATIONAL CONFERENCE ON MECHANICAL, CONTROL AND COMPUTER ENGINEERING (ICMCCE 2019), 2019, : 34 - 38
  • [3] Improvement of bandwidth of phase-locked loop for mode-locked laser with multiple-differentials-based loop filter
    Hou, Dong
    OPTICS EXPRESS, 2019, 27 (09) : 13460 - 13468
  • [4] ANALYSIS OF THE INFLUENCE OF THE LOOP FILTER IN THE PHASE LOCKED LOOP ON THE OUTPUT PHASE NOISE
    Han, Yao
    Zhang, Qi
    Li, Cheng-Ke
    Li, Xiao-Di
    2018 15TH INTERNATIONAL COMPUTER CONFERENCE ON WAVELET ACTIVE MEDIA TECHNOLOGY AND INFORMATION PROCESSING (ICCWAMTIP), 2018, : 185 - 189
  • [5] Memristor-Based Loop Filter Design for Phase Locked Loop
    Adesina, Naheem Olakunle
    Srivastava, Ashok
    JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS, 2019, 9 (03)
  • [6] Digital Phase Locked Loop Design using Discrete Time Sliding Mode Loop Filter
    Asad, M.
    Bhatti, A. I.
    Iqbal, S.
    2013 IEEE 9TH INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES (ICET 2013), 2013, : 49 - 54
  • [7] Optimization of parameters of pulse-phase locked loop with filter of first order
    Prokhladin, G.I., 1991,
  • [8] Nonlinear dynamics of phase-locked loop with the second-order filter
    Matrosov V.V.
    Radiophys. Quantum Electron., 2006, 3 (239-249): : 239 - 249
  • [9] Novel Phase-Locked Loop Using Adaptive Notch Filter
    Xu, Lin
    Han, Yang
    Zhou, Li-Dan
    Yao, Gang
    Mansoor
    Chen, Chen
    Pan, Junmin
    ELEKTRONIKA IR ELEKTROTECHNIKA, 2009, (04) : 7 - 12
  • [10] Area Efficient Loop Filter Design for Charge Pump Phase Locked Loop
    Raghavendra, R. G.
    Amrutur, Bharadwaj
    GLSVLSI'07: PROCEEDINGS OF THE 2007 ACM GREAT LAKES SYMPOSIUM ON VLSI, 2007, : 148 - 151
12345