FinFET SRAM for high-performance low-power applications

被引：22

作者：

Joshi, RV ^{[1
]}

Williams, RQ ^{[1
]}

Nowak, E ^{[1
]}

Kim, K ^{[1
]}

Beintner, J ^{[1
]}

Ludwig, T ^{[1
]}

Aller, I ^{[1
]}

Chuang, C ^{[1
]}

机构：

[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

ESSDERC 2004: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2004年

关键词：

D O I：

10.1109/ESSDER.2004.1356490

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

SRAM behavior of FinFET technology is investigated and compared with 90 nm node planar partially-depleted silicon-on-insulator (PD-SOI) technology. Unique FinFET circuit behavior in SRAM applications, resulting from the near-ideal device characteristics, is demonstrated by full cell cross section simulation for the first time, and shows high performance and low active and standby power. SRAM stability is in detail analyzed as compared to PD-SOI.

引用

页码：69 / 72

页数：4

共 50 条

[21] Strained SOI technology for high-performance, low-power CMOS applications
Takagi, S
Mizuno, T
Tezuka, T
Sugiyama, N
Numata, T
Usuda, K
Moriyama, Y
Nakaharai, S
Koga, J
Tanabe, A
Maeda, T
2003 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE: DIGEST OF TECHNICAL PAPERS, 2003, 46 : 376 - +
[22] Benchmarking nanotechnology for high-performance and low-power logic transistor applications
Chau, R
2004 4TH IEEE CONFERENCE ON NANOTECHNOLOGY, 2004, : 3 - 6
[23] A low-power embedded SRAM for wireless applications
Cosemans, Stefan
Dehaene, Wim
Catthoor, Francky
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (07) : 1607 - 1617
[24] Finfet based sram design for low standby power applications
Cakici, Tamer
Kim, Keejong
Roy, Kaushik
ISQED 2007: PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2007, : 127 - +
[25] Design of SRAM Cell using FinFET for Low Power Applications
Vajeer, Shruthi
Vallab, Lavanya
Yada, Pravalika
Vallem, Sharmila
2024 7TH INTERNATIONAL CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS, ICDCS 2024, 2024, : 243 - 247
[26] A sub-threshold 10T FinFET SRAM cell design for low-power applications
Dolatshah, Amir
Abbasian, Erfan
Nayeri, Maryam
Sofimowloodi, Sobhan
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2022, 157
[27] High-performance low-power FFT cores
Han, Wei
Erdogan, Ahmet T.
Arslan, Tughrul
Hasan, Mohd.
ETRI JOURNAL, 2008, 30 (03) : 451 - 460
[28] A FinFET Based Low-Power Write Enhanced SRAM Cell With Improved Stability
Sharma, Atharv
Sharma, Kulbhushan
Tomar, V. K.
Sachdeva, Ashish
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2024, 187
[29] Improved Stability for Robust and Low-Power SRAM Cell using FinFET Technology
Haq, Shams Ul
Sharma, Vijay Kumar
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2024, 33 (06)
[30] Double-gate SOI devices for low-power and high-performance applications
Roy, K
Mahmoodi, H
Mukhopadhyay, S
Ananthan, H
Bansal, A
Cakici, T
19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 445 - 452

← 1 2 3 4 5 →