A CMOS front-end circuit for SONET OC-96 receiver

被引:0
|
作者
Liu, Jinbin [1 ]
Gu Ming [1 ]
Chen Hongda [1 ]
Gao Peng [1 ]
机构
[1] Chinese Acad Sci, Inst Semicond, State Key Lab Integrated Optoelect, Beijing 100083, Peoples R China
基金
中国国家自然科学基金;
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An optical receiver front-end for SONET OC-96 receivers was analyzed and designed in 0.18 mu m CMOS process. It consists of a transimpedance amplifier (TIA) and a limiting amplifier (LA). The TIA takes a fully differential configuration, and regulated cascode (RGC) input stage is implemented. The LA was realized by five cascaded identical gain stages with active inductor load. The TIA achieved 4.2GHz bandwidth for 0.5pF photodiode (PD) capacitance and 1.2k 0 transimpedance gain. The LA achieved 5.4GHz bandwidth and 29dB voltage gain. The optical sensitivity is -19dBm at 5-Gb/s for a bit-error rate of 10(-12), and it dissipates 45.5mW for I.8V supply.
引用
收藏
页码:1961 / +
页数:2
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