Design Considerations of Charge Pump for Antenna Switch Controller With SOI CMOS Technology

被引:5
|
作者
Yu, Kai [1 ]
Li, Sizhen [1 ]
Zhang, Gary [1 ]
Zhang, Zhihao [1 ]
Tong, Qiaoling [2 ]
Zou, Xuecheng [2 ]
机构
[1] Guangdong Univ Technol, Sch Informat Engn, Guangzhou 510006, Guangdong, Peoples R China
[2] Huazhong Univ Sci & Technol, Sch Opt & Elect Informat, Wuhan 430074, Peoples R China
基金
中国国家自然科学基金;
关键词
Antenna switch controller; charge pump; silicon-on-insulator (SOI) CMOS technology; CAPACITOR VOLTAGE DOUBLER; NO REVERSION LOSS; T/R SWITCH;
D O I
10.1109/TCSII.2016.2554978
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An enhanced charge pump for the antenna switch controller using the silicon-on-insulator (SOI) CMOS technology is presented in this brief. The pseudo cross-coupled technique is proposed to reduce parasitic capacitances at charging/discharging nodes through charge transferring paths, which improves the current drive capability and provides better accuracy of the output voltage. Furthermore, the codesign between the gate control voltages of power MOS transistors and the clock drive signals of pumping capacitors has been investigated to eliminate the reversion loss and reduce the ripple voltage. The pseudo cross-coupled charge pump has been fabricated in the 0.18-mu m SOI CMOS technology with an area of 0.065mm(2). According to the comparison results of the conventional and enhanced charge pumps, the start-up time and the recovery time are typically shortened by 71.4% and 21.7%, owing to the improvement of the current drive capability, and the ripple voltage at no-load condition is greatly reduced by 46.1%.
引用
收藏
页码:229 / 233
页数:5
相关论文
共 50 条
  • [31] Low-Voltage Low-Distortion Sampling Switch Design in 22 nm FD-SOI CMOS Technology
    Bora, Pragoti Pran
    Borggreve, David
    Vanselow, Frank
    Isa, Erkan
    Maurer, Linus
    2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2017, : 86 - 89
  • [32] 4G Antenna Tuner Integrated in a 130 nm CMOS SOI Technology
    Sonnerat, Florence
    Pilard, Romain
    Gianesello, Frederic
    Le Pennec, Francois
    Person, Christian
    Gloria, Daniel
    2012 IEEE 12TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF), 2012, : 191 - 194
  • [33] Power efficient charge pump in deep submicron standard CMOS technology
    Pelliconi, R
    Iezzi, D
    Baroni, A
    Pasotti, M
    Rolandi, PL
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (06) : 1068 - 1071
  • [34] A high-performance CMOS-SOI antenna switch for the 2.5-5-GHz band
    Tinella, C
    Fournier, JM
    Belot, D
    Knopik, V
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (07) : 1279 - 1283
  • [35] Design technique of an on-chip, high-voltage charge pump in SOI
    Hoque, MR
    Ahmad, T
    McNutt, T
    Mantooth, A
    Mojarradi, MM
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 133 - 136
  • [36] Design and implementation of a CMOS charge pump phase-locked loop
    Zhang Yapeng
    Ye Tianxiang
    Qu Zhijuan
    PROCEEDINGS OF 2018 IEEE 4TH INFORMATION TECHNOLOGY AND MECHATRONICS ENGINEERING CONFERENCE (ITOEC 2018), 2018, : 635 - 640
  • [37] Design Topologies of a CMOS Charge Pump Circuit for Low Power Applications
    Rahman, Labonnah Farzana
    Marufuzzaman, Mohammad
    Alam, Lubna
    Bin Mokhtar, Mazlin
    ELECTRONICS, 2021, 10 (06) : 1 - 13
  • [38] A Radiation Hardened SRAM Cell Design in PD-SOI CMOS Technology
    Wang, Yiqi
    Li, Ying
    Zhao, Fazhan
    Liu, Mengxin
    Han, Zhengsheng
    2011 INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2011,
  • [39] Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology
    Jacquemod, Gilles
    Geynet, Lionel
    Nicolle, Benjamin
    de Foucauld, Emeric
    Tatinian, William
    Vincent, Pierre
    MICROELECTRONICS JOURNAL, 2008, 39 (09) : 1130 - 1139
  • [40] Millimeter wave design with 65 nm LP SOI HR CMOS technology
    Martineau, B.
    Douyere, S.
    Cathelin, A.
    Danneville, F.
    Raynaud, C.
    Dambrine, G.
    Lepilliet, S.
    Gianesello, F.
    Belot, D.
    2007 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 2007, : 107 - +