Design of a transmission gate based CMOL memory array

被引:1
|
作者
Abid, Z. [1 ]
Barua, M. [1 ]
Alma'aitah, A. [1 ]
机构
[1] Univ Western Ontario, Dept Elect & Comp Engn, London, ON, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
D O I
10.1049/mnl:20080012
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
A design of a nanoelectronic memory array, compatible with both the molecular switch (nanodevice) electrical characteristics and CMOS 45 nm semiconductor technology node is presented. The proposed transmission gate based CMOL (hybrid CMOS/MOLecular) memory cell does not suffer from the operational difficulties faced by the conventional CMOL cell. The control circuitry with improved multiplexer designs is introduced, and it shows that the required voltage levels to program the nanodevices can be achieved. Moreover, the proposed memory cell has the same area as the existing CMOL inverter cell allowing easier implementation of both logic and memory circuits on the same chip.
引用
收藏
页码:70 / 76
页数:7
相关论文
共 50 条
  • [1] Design of a transmission gate based CMOS/molecular (CMOL) memory cell
    Barua, Mrinmoy
    Abid, Z.
    2008 INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE, 2008, : 78 - 81
  • [2] UNIVERSAL LOGIC GATE TRANSMISSION GATE ARRAY
    ZHANG, C
    ELECTRONIC ENGINEERING, 1985, 57 (706): : 61 - &
  • [3] A secure dynamically programmable gate array based on ferroelectric memory
    Oura, M
    Masui, S
    FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 2003, 39 (01): : 52 - 61
  • [4] Ferroelectric memory based secure dynamically programmable gate array
    Masui, S
    Ninomiya, T
    Oura, M
    Yokozeki, W
    Mukaida, K
    Kawashima, S
    2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2002, : 200 - 203
  • [5] UNIVERSAL LOGIC GATE TRANSMISSION GATE ARRAY.
    Zhang, C.
    Electronic Engineering (London), 1985, 57 (706): : 61 - 64
  • [6] Efficient CMOL Gate Designs for Cryptography Applications
    Abid, Z.
    Alma'aitah, A.
    Barua, M.
    Wang, W.
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2009, 8 (03) : 315 - 321
  • [7] A ferroelectric memory-based secure dynamically programmable gate array
    Masui, S
    Ninomiya, T
    Oura, M
    Yokozeki, W
    Mukaida, K
    Kawashima, S
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (05) : 715 - 725
  • [8] IN-HOUSE GATE ARRAY DESIGN
    CARLSTEDTDUKE, T
    ELECTRONICS & WIRELESS WORLD, 1988, 94 (1628): : 608 - 608
  • [9] COMPUTER-AIDED-DESIGN OF LSI BASED ON GATE ARRAY CHIPS
    MIKHAYLOV, SA
    IZVESTIYA VYSSHIKH UCHEBNYKH ZAVEDENII RADIOELEKTRONIKA, 1991, 34 (09): : 54 - 59
  • [10] Design of Electromagnetic Signal Generator Based on Field Programmable Gate Array
    Li, Yansheng
    Wang, Meng
    Wu, Mi
    2019 IEEE INTERNATIONAL WORKSHOP ON ELECTROMAGNETICS: APPLICATIONS AND STUDENT INNOVATION COMPETITION (IWEM2019), 2019,