Pad Characterization for CMOS Technology Using Time Domain Reflectometry

被引：0
|
作者：
Chiu, C. S. [1 ]
Chen, W. L. [1 ]
Liao, K. H. [1 ]
Chen, B. Y. [1 ]
Teng, Y. M. [1 ]
Huang, G. W. [1 ]
Wu, L. K. [2 ]
机构：
[1] Natl Nano Device Labs, 26 Prosper Rd 1 Sci Based Ind Pk, Hsinchu 30078, Taiwan
[2] Natl Chiao Tung Univ, Dept Commun Engn, Hsinchu 30050, Taiwan
来源：
2008 IEEE INTERNATIONAL RF AND MICROWAVE CONFERENCE, PROCEEDINGS | 2008年
关键词：
Time domain reflectometry (TDR); Capacitance; Impedance; Pad structure; On-wafer;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The pad structure of CMOS technology is characterized by way of time domain reflectometry measurement. Using the on-wafer TDR measurement system, the capacitance of the pad in the CMOS process was extracted and estimated. Measured and Simulated TDR data are also presented in this study. The capacitance is estimated when the curve is fitted by mathematical tool. This method is simple to use, and furthermore the results agree with data extracted from vector network analyzer.
引用
收藏
页码：214 / +
页数：2
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