Timing Predictability in High-Performance Computing With Probabilistic Real-Time

被引:6
|
作者
Reghenzani, Federico [1 ]
Massari, Giuseppe [1 ]
Fornaciari, William [1 ]
机构
[1] Politecn Milan, Dipartimento Elettron Informaz & Bioingn, I-20133 Milan, Italy
来源
IEEE ACCESS | 2020年 / 8卷 / 08期
关键词
Embedded systems; Static analysis; Probabilistic logic; Real-time systems; Hardware; Timing; Resource management; Heterogeneous computing; high performance computing; real-time systems; statistical timing analysis;
D O I
10.1109/ACCESS.2020.3038559
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Application requirements in High-Performance Computing (HPC) are becoming increasingly exacting, and the demand for computational resources is rising. In parallel, new application domains are emerging, as well as additional requirements, such as meeting real-time constraints. This requirement, typical of embedded systems, is difficult to guarantee when dealing with HPC infrastructures, due to the intrinsic complexity of the system. Traditional embedded systems static analyses to estimate the Worst-Case Execution Time (WCET) are not applicable to HPC, because modeling and analyzing all the system's hardware and software components is not practical. Measurement-based probabilistic analyses for the WCET emerged in the last decade to overcome these issues, but it requires the system to satisfy certain conditions to estimate a correct and safe WCET. In this work, we show the emerging application timing requirements, and we propose to exploit the probabilistic real-time theory to achieve the required time predictability. After a brief recap of the fundamentals of this methodology, we focus on its applicability to HPC systems to check their ability to satisfy such conditions. In particular, we studied the advantages of having heterogeneous processors in HPC nodes and how resource management affects the applicability of the proposed technique.
引用
收藏
页码:208566 / 208582
页数:17
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