Novel high temperature multilayer electrode-barrier structure for high-density ferroelectric memories

This has been accomplished in the past using four/five separate electrode- and diffusion-barrier layers. In this letter, we report a novel Pt-Rh-O-x/Pt-Rh/Pt-Rh-O-x electrode-barrier structure which acts as an electrode as well as a diffusion barrier for integration of the ferroelectric capacitors directly onto silicon deposited using an in situ reactive rf sputtering process. The electrodes have a smooth and fine grained microstructure and are excellent diffusion barriers between the PbZr0.53Ti0.47O3 (PZT) and Si substrate and exhibit good thermal stability up to very high processing temperatures of 700 degrees C. The ferroelectric (PZT) test capacitors using these electrode barriers grown directly on Si, show well saturated hysteresis loops with P-r and E-c of 16 mu C/cm(2) and 30-40 kV/cm, respectively. The capacitors exhibit no significant fatigue loss (<5%) up to 10(11) cycles and have low leakage currents (2X10(-8) A/cm(2) at 100 kV/cm). These electrode barriers can be used to directly integrate the thin film capacitors on the source/drain of the transistors of the memory cell structure for accomplishing large scale integration. (C) 1997 American Institute of Physics.