Bulk Linearization Techniques

被引:0
|
作者
Arnaud, Alfredo [1 ]
Puyol, Rafael [1 ]
Hardy, Denisse [1 ]
Miguez, Matias [1 ]
Gak, Joel [1 ]
机构
[1] Univ Catolica Uruguay, Elect Engn Dept, Ave 8 Octubre 2738, Montevideo 11600, Uruguay
关键词
linearization; bulk-degeneration; CMOS transistor; LINEAR-RANGE; DESIGN;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The use of the bulk terminal to enhance the linear properties of the MOS transistor is examined. Firstly, bulk-linearization of a MOS differential pair is presented, including harmonic distortion measurements. Then bulk-degeneration technique is extended to the triode region to implement large MOS pseudo-resistors. A new asymmetric bulk-modified composite MOS with an equivalent saturation voltage of several hundred mV is introduced, and a 150M Omega pseudo-resistor by stacking a few of these stages is presented. Finally, bulk-linearization of the MOS differential pair and the MOS resistor are combined to implement a 6.4nS transconductor with above 1V linear range, consuming only 6nA, improving the compromise between linear range and power consumption of previously reported small transconductance OTAs.
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页数:5
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