Effect of source/drain overlap region on device performance in a-IGZO thin-film transistors

被引:6
|
作者
Nam, Dong-Ho [1 ]
Choi, Kwang-il [1 ]
Park, Sung-Soo [1 ]
Park, Jeong-Gyu [1 ]
Choi, Won-Ho [1 ]
Han, In-Shik [1 ]
Lee, Hi-Deok [1 ]
Jeong, Jae-Kyeong [2 ]
Lee, Ga-Won [1 ]
机构
[1] Chungnam Natl Univ, Dept Elect Engn, Taejon 305764, South Korea
[2] Samsung SDI Co Ltd, Kyonggi Do, South Korea
关键词
a-IGZO; thin-film transistor; source/drain overlap; source/drain offset;
D O I
10.1889/JSID17.9.735
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the effect of source/drain overlap length on the amorphous indium gallium zinc oxide (a-IGZO) TFT performance has been investigated. Results of this paper show that as source/drain overlap length decreases to a negative value forming S/D offset, the threshold voltage and S parameters of a-IGZO TFTs increased and the field-effect mobility decreased. The V(T) variation increases sharply as the channel length decreases because of the large resistance R(offset) when it is formed at a-IGZO source/drain. In the experiment, R(offset) of each 1 mu m, evaluated from the transfer length method (TLM), shows approximately 54-66 k Omega. This means that the source/drain overlap length is a very important control parameter for uniform device characteristics of a-IGZO TFTs.
引用
收藏
页码:735 / 738
页数:4
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