A compiler driven simulation technique for the analysis of digital logic circuit

被引:0
|
作者
Sadat, A [1 ]
Chowdhury, MU [1 ]
机构
[1] Bangladesh Open Univ, Sch Sci & Technol, Gazipur, Bangladesh
关键词
simulation; digital logic circuit; graphical analysis; compiler driven; feedback handling;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An interface technique for design and analysis of digital circuits has been devised and described in this paper. Basically logic circuits are of two types: combinational circuits and sequential circuits. Logic simulation usually means finding the transient response to a set of time-varying inputs. Simulation follows functional or behavioral level design. Behavioural simulation describes logic function and timing; functional simulation describes the logic function of a system only and ignores the timing. A simulation program for giving the output of digital logic circuits is available, but the approach taken here describes an efficient way to analyze both combinational and sequential circuits. To do this an algorithm has been developed, coded in Turbo C and tested with test cases to analyze and provide output from that logic circuit.
引用
收藏
页码:153 / 156
页数:4
相关论文
共 50 条
  • [41] A Data-Driven Inductor Modeling Technique Using Parametric Circuit Simulation and Deep Learning
    Motomatsu, Takehiro
    Koga, Takahiro
    Shigei, Noritaka
    Yamaguchi, Masahiro
    Itagaki, Atsushi
    Ishizuka, Yoichi
    IEEE TRANSACTIONS ON MAGNETICS, 2023, 59 (11)
  • [42] MCAST: An abstract-syntax-tree based model compiler for circuit simulation
    Wan, B
    Hu, BP
    Zhou, LL
    Shi, CJR
    PROCEEDINGS OF THE IEEE 2003 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2003, : 249 - 252
  • [43] An efficient nonlinear circuit simulation technique
    Dautbegovic, E
    Condon, M
    Brennan, C
    2004 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2004, : 623 - 626
  • [44] An efficient Nonlinear circuit simulation technique
    Dautbegovic, E
    Condon, M
    Brennan, C
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2005, 53 (02) : 548 - 555
  • [45] A reduction technique of Petri nets based on logic circuit
    Ye, Jian-Hong
    Song, Wen
    Sun, Shi-Xin
    Ruan Jian Xue Bao/Journal of Software, 2007, 18 (07): : 1553 - 1562
  • [46] Computing logic-stage delays using circuit simulation and symbolic Elmore analysis
    McDonald, CB
    Bryant, RE
    38TH DESIGN AUTOMATION CONFERENCE PROCEEDINGS 2001, 2001, : 283 - 288
  • [47] DESIGN CONTROL LOGIC USING A DIGITAL TECHNIQUE
    PEARSON, WE
    CONTROL ENGINEERING, 1969, 16 (02) : 85 - &
  • [48] SIMULATION OF DIGITAL CONTROL SYSTEMS ON AN ANALOG COMPUTER WITH DIGITAL LOGIC
    CLEMENCE, CR
    SIMULATION, 1970, 14 (02) : 89 - &
  • [49] The Effectiveness of Logic Circuit Instruction using Simulation Software
    Wu, Wen-Chuan
    Chuang, Chien-Pen
    JCPC: 2009 JOINT CONFERENCE ON PERVASIVE COMPUTING, 2009, : 705 - 708
  • [50] LOGIC CIRCUIT SIMULATION USING S/360 CSMP
    MATHEWS, RC
    SIMULATION, 1970, 15 (02) : 92 - &