FPGA realization of line-interactive uninterruptible power supply

A novel design of line-interactive uninterruptible power supplies is proposed in this paper. In the designated circuit, by utilizing single-stage power converter, the system can be operated either in the active power filter mode or in the voltage-stabilizing mode based on the operating state of mains power. When the system is operated at the active power filter mode, both the harmonic reduction and reactive power compensation can be achieved via a set of current feedback signals. When the system is operated at the voltage-stabilizing mode, by deeming the capacitor current as the control variable, the first-order current control method can be formulated such that the system stability is maintained while the speed response is significantly improved. With the aid of the FP GA in the digital design, it is found that the hardware circuit can be realized within a shorter time and the design cost can be also lowered down. This proposed system has been validated by theoretical analysis and experimental realization. Test results support the feasibility of the proposed approach for the application considered.