An Architecture Design for Evolvable Computer

被引：0
|
作者：
Yan, Xuesong [1 ,2 ]
Shi, Chen [3 ]
Kang, Lishan [1 ]
Huang, Shitan [3 ]
机构：
[1] China Univ Geosci, Sch Comp Sci, Wuhan 430074, Peoples R China
[2] China Univ Geosci, Res Ctr Space Sci & Technol, Wuhan, Peoples R China
[3] XiAn Microelect Technol Inst, Xian, Peoples R China
来源：
ADVANCES IN COMPUTATION AND INTELLIGENCE, PROCEEDINGS | 2008年 / 5370卷
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
In recent years, there has been a remarkable growth of the portable computing devices market. To develop and design a scalable, programmable architecture that can be dynamically reconfigured during program execution to a new circuit structure is a key design goal for self-reconfigurable computing systems. In this paper we proposes a new architecture of evolvable computer, this architecture consists of a general-purpose processor, a reconfigurable component (programmable array) and a evolutionary algorithms processor (DSP), and describe the work mechanism of the evolvable computer in detail.
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页码：206 / +
页数：2
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