Layout Techniques for Radiation Hardening of Standard CMOS Active Pixel Sensors

被引：0

作者：

Braga, Leo H. C. ^{[1
]}

Domingues, Suzana ^{[1
]}

Rocha, Milton F. ^{[1
]}

Sa, Leonardo B. ^{[1
]}

Campos, Fernando

Santos, Filipe V. ^{[1
]}

Mesquita, Antonio C. ^{[1
]}

Silva, Mario V. ^{[1
]}

Swart, Jacobus W.

机构：

[1] Univ Fed Rio de Janeiro, Lab Projeto Circuitos Integrados LPC, BR-21941 Rio De Janeiro, Brazil

来源：

SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN | 2007年

关键词：

Active Pixel Sensor; radiation hardeness; CMOS;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a radiation hardened Active Pixel Sensor implemented in a standard 0.35 mu m CMOS process. The integrated circuit is composed of a 64x64 pixel matrix with a 25 mu m pixel pitch and has four different pixel architectures. There are also test structures to permit the characterization of the MOS transistors. The radiation hardening of the circuit is implemented with two layout techniques: enclosed geometry transistors and guard rings. It is shown that, with these techniques, the sensor is able to operate with total ionization doses that surpass 500krad, which is more than double of the requirement for our application. Also, the techniques do not compromise the optical response of the pixels. To obtain an electrical model of the designed transistors, an EKV MOSFET Model was extracted.

引用

页码：257 / 262

页数：6

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