A low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90 nm CMOS

被引:0
|
作者
Kienmayer, C [1 ]
Tiebout, M [1 ]
Simbürger, W [1 ]
Scholtz, AL [1 ]
机构
[1] Vienna Univ Technol, Inst Commun & Radio Frequency Engn, A-1040 Vienna, Austria
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A fully differential low-voltage mixer topology is presented. The problem of stacking input-, cascode- and switching-transistors within 1.2 V supply voltage is solved by the use of a bulk driven mixer core. In order to demonstrate the feasibility a testchip was manufactured in INFINEON triple well 90 nm standard CMOS process. The differential mixer includes an on-chip resistive 50 Q termination and an operational amplifier for measurements. The chip features a gain of 3.2 dB. a DSB noise figure of 17.4 dB, an input IP3 of -2.1 dBm. an input 1dB compression point of -13.3 dBm and consumes 1.8 mW at a power supply voltage of 1.2 V. The mixer has a 3 dB low-pass bandwidth of 20 GHz.
引用
收藏
页码:385 / 388
页数:4
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