Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer

被引：9
|
作者：
Dutta, Arka [1 ]
Koley, Kalyan [1 ]
Sarkar, Chandan K. [1 ]
机构：
[1] Jadavpur Univ, Nano Device Simulat Lab, Elect & Telecommun Engn Dept, Kolkata 700032, India
来源：
MICROELECTRONICS RELIABILITY | 2014年 / 54卷 / 6-7期
关键词：
SUBTHRESHOLD ANALOG/RF PERFORMANCE; FRINGE CAPACITANCE; FINFETS; OPTIMIZATION; DGMOS; FETS;
D O I：
10.1016/j.microrel.2013.12.001
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In analog and RF circuit applications Harmonic distortion (HD) is an important reliability issue that arises due to non-linear performance of devices. In this paper, the asymmetric underlap double gate MOSFET (AUDG-MOSFET) is analyzed for the HD with high-k spacers. In this analysis the devices are compared for their primary distortion components designated by the second order distortion (HD2), the third order distortion (HD3) and the total harmonic distortion (THD). The distortion characteristics of the device are studied as a function of the gate voltage (V-gs) and the transconductance generation factor (g(m)/I-d) considering the influence of drain current (I-d) and the transconductance (g(m)). A significant improvement on the HD of the device by using high-k spacers is inferred, thereby ascertaining better reliability for RF applications. In addition to this, the distortion in the output characteristics of Cascade and differential amplifier circuits designed with AUDG-MOSFET device is also analyzed in detail. (C) 2013 Elsevier Ltd. All rights reserved.
引用
收藏
页码：1125 / 1132
页数：8
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