Performance Modelling of Heterogeneous ISA Multicore Architectures

Recent research has shown that heterogeneous multicore architectures have the potential to further improve single thread performance. In such architectures different phases of the application are executed on different cores to improve performance and energy efficiency. However, restricting the cores to a single ISA limits the achievable performance gain. Different phases of applications also have shown affinity towards different ISAs due to their characteristics, functionality etc. Heterogeneous ISA architectures thus attempt to execute these different phases on their respective affine cores to fully harness ISA diversity. However, in such architectures, estimating the best migration point from one ISA to another, is an open research problem. This paper proposes a performance model for execution time estimation of heterogeneous ISAs which naturally extends to dynamic scheduling. The model is centred around execution time and a few on-line parameters. Regression techniques have been used to model the performance. Experimental evaluation shows that the proposed model has 78% accuracy in estimating migration from ARM ISA to X86 ISA.