EFFICIENT SPACE-FILLING ONE DIMENSIONAL SCAN GENERATOR

This paper presents an approach across a VLSI implementation of the Peano-scan one-dimensional Discrete Wavelet Transform (1-D DWT) for image processing. The Peano-scan is a specific space-filling curve "SFC" created using a bit splicing of its grid coordinates. In this study, the MATLAB 2009b program was used effectively to measure and compare between Peano-scan one dimensional Discrete Wavelet Transform architecture and the classical two-dimensional discrete wavelet transform (2-D DWT) via the Signal to Noise Ratio (SNR). This paper depended on the FPGA board based Spartan-3E and ISE design suite 14.2 program to build the Peano-scan and calculate the die area which appears to not occupy more than 4% with a maximum operating frequency of 61.2445MHz.