An improved voltage doubler in a standard CMOS technology

被引：0
|
作者：
Favrat, P
Deval, P
Declercq, MJ
机构：
来源：
ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE | 1997年
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D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
A charge pump cell is used to make a voltage doubler using improved serial switches. The PMOS transistor used for the serial switch is analyzed and a model ready for simulation is described. The importance of capacitors is shown with plots of efficiency versus load and stray capacitors. Several optimizations and problems arising at low voltage or high frequency are presented. The substrate current is totally suppressed by the technique of bulk commutation. The real efficiency, when all optimizations are implemented, approaches 80%.
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页码：249 / 252
页数：4
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