Verification of embedded system's specification using collaborative simulation of SysML and Simulink models

被引:23
|
作者
Kawahara, Ryo [1 ]
Nakamura, Hiroaki [1 ]
Dotan, Dolev [2 ]
Kirshin, Andrei [2 ]
Sakairi, Takashi [1 ]
Hirose, Shinichi [1 ]
Ono, Kohichi [1 ]
Ishikawa, Hiroshi [1 ]
机构
[1] IBM Res, Tokyo Res Lab, 1623-14 Shimotsuruma, Yamato, Kanagawa 2428502, Japan
[2] IBM Res, Haifa Res Lab, Haifa, Israel
关键词
D O I
10.1109/MBSE.2009.5031716
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The authors propose an extension of SysML which enables description of continuous-time behavior The authors also develop its execution tool integrated on Eclipse-based platform by exploiting co-simulation of SysML and MATLAB / Simulink. To demonstrate the effectiveness of the tool and the extension to SysML in verifying specifications of an embedded system, we create a sample model and analyze its execution results by checking constraints under a test case.
引用
收藏
页码:21 / +
页数:3
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