Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers

A new design approach for three-stage operational transconductance amplifiers with nested Miller compensation is presented in this paper. By systematically optimizing the amplifier settling behavior, the proposed methodology allows the required speed performances to be reached, avoiding power wasting and blind efforts for trial-and-error design procedures. To demonstrate the effectiveness of the strategy, a three-stage nested-Miller amplifier in voltage follower configuration is simulated in a commercial 0.35 mu m CMOS technology. As shown by simulation results, the proposed approach comes in useful to develop fast-settling three-stage amplifiers which are badly needed in many modem applications.