Evaluation of parallelization of an image processing algorithm for an embedded multicore platform using manual parallelization and the OpenMP parallel framework

被引:0
|
作者
Prokesch, Richard [1 ]
机构
[1] Austrian Inst Technol GmbH, Safety & Secur Dept, High Performance Image Proc, Vienna, Austria
关键词
digital signal processor; embedded system; image processing algorithm; manual parallelization; OpenMP; performance comparison;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper manual parallelization is compared with parallelization using the Open Multi-Processing (OpenMP) software framework on an embedded eight core Digital Signal Processor (DSP) developed by Texas Instruments. In order to compare these two methods an in-house developed 2D image registration algorithm is parallelized. Furthermore considerations regarding the parallelization on this DSP are presented. Finally both parallelization methods in respect of performance and real time behavior are measured and analyzed.
引用
收藏
页码:2256 / 2260
页数:5
相关论文
共 50 条
  • [41] Distributed/Parallel Genetic Algorithm for Road Traffic Network Division using a Hybrid Island Model/Step Parallelization Approach
    Potuzak, Tomas
    2016 IEEE/ACM 20TH INTERNATIONAL SYMPOSIUM ON DISTRIBUTED SIMULATION AND REAL TIME APPLICATIONS (DS-RT), 2016, : 170 - 177
  • [42] Implementation of Parallel Image Processing Using NVIDIA GPU Framework
    Daga, Brijmohan
    Bhute, Avinash
    Ghatol, Ashok
    ADVANCES IN COMPUTING, COMMUNICATION AND CONTROL, 2011, 125 : 457 - +
  • [43] Implementation of parallel K-means algorithm for image classification using OpenMP and MPI libraries
    Tanovic, Anja
    Vranjkovic, Vuk
    2024 ZOOMING INNOVATION IN CONSUMER TECHNOLOGIES CONFERENCE, ZINC 2024, 2024, : 54 - 59
  • [44] Image coding using parallel implementations of the embedded zerotree wavelet algorithm
    Creusere, CD
    DIGITAL VIDEO COMPRESSION: ALGORITHMS AND TECHNOLOGIES 1996, 1996, 2668 : 82 - 92
  • [45] Portable Framework for Real-Time Parallel Image Processing on High Performance Embedded Platforms
    Eisserer, Clemens
    23RD EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2015), 2015, : 721 - 724
  • [46] Evaluation of Stencil Based Algorithm Parallelization over System-on-Chip FPGA Using a High Level Synthesis Tool
    Castano-Londono, Luis
    Alzate Anzola, Cristian
    Marquez-Viloria, David
    Gallo, Guillermo
    Osorio, Gustavo
    APPLIED COMPUTER SCIENCES IN ENGINEERING (WEA 2019), 2019, 1052 : 52 - 63
  • [47] A Survey on Parallel Image Processing Studies Using CUDA Platform in GPU Programming
    Aydin, Semra
    Samet, Refik
    Bay, Omer Faruk
    JOURNAL OF POLYTECHNIC-POLITEKNIK DERGISI, 2020, 23 (03): : 737 - 754
  • [48] Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons
    Hanen Chenini
    Jean Pierre Dérutin
    Romuald Aufrère
    Roland Chapuis
    EURASIP Journal on Advances in Signal Processing, 2013 (1)
  • [49] Reengineering a Single Threaded Embedded Missile Application onto a Parallel Processing Platform Using MetaH
    David J. McConnell
    Bruce Lewis
    Lisa Gray
    Real-Time Systems, 1998, 14 : 7 - 20
  • [50] Reengineering a single threaded embedded missile application onto a parallel processing platform using MetaH
    McConnell, DJ
    Lewis, B
    Gray, L
    REAL-TIME SYSTEMS, 1998, 14 (01) : 7 - 20