Enhanced Etch Process for TSV & Deep Silicon Etch

被引:0
|
作者
Xu, Qing [1 ]
Paterson, Alex [1 ]
McChesney, Jon [1 ]
Dover, Russell [1 ]
Yamaguchi, Yoko [1 ]
Eppler, Aaron [1 ]
机构
[1] Lam Res Corp, Fremont, CA USA
关键词
TSV; CIS; deep silicon etch; high etch rate; scallops;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One of the key challenges of deep Si etch is feature control versus high etch rate. Scallop sizes increase with increased etch rate and uniformity degrades. This paper provides an overview of an enhanced rapid alternating process (RAP) in combination with a hardware design that breaks this trade off. Scallop control is achieved through very fast switching of gasses, bias and pressure (up to 10 times faster than the typical Bosch process). This new RAP is combined with a proprietary gas injection architecture to ensure uniformity of depth, both locally and across the wafer, by ensuring uniform dissociation of feedstock. Finally, this paper will show how a robust design has to address the challenges of increased thermal loads which can manifest as etch rate drifts and depth uniformity variations. The result is an increase in TSV throughput by > 200% and a reduction in scallop size by ten-fold.
引用
收藏
页码:426 / 428
页数:3
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