Low-noise low-power front-end logarithmic amplifier for neural recording system

被引：9

作者：

Derafshi, Zahra Haddad ^{[1
]}

Frounchi, Javad ^{[1
]}

机构：

[1] Univ Tabriz, Microelect & Microsensor Res Lab, Tabriz, Iran

来源：

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | 2014年 / 42卷 / 05期

关键词：

low noise; low power; neural recording system; linear limit logarithmic amplifier; neural signals; ARRAY;

D O I：

10.1002/cta.1861

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this work, a low-power, low-noise logarithmic preamplifier for biopotential and neural recording application is presented. The amplifier is based on a linear limit logarithmic amplifier technique, and an active filter as a DC cancellation filter has been included to its input in order to eliminate DC offsets, which are produced at the electrode-tissue interface. This system has been simulated in a UMC standard 90-nm 1P9M CMOS process. Five dual gain stages are used to produce the required linear limit logarithmic amplifier. The dynamic range of the amplifier is measured to be 48 dB which covers the signals with amplitude from 20 mu V to 5 mV. The amplifier consumes 23.5 mu W from a 1.2-V power supply and has a maximum gain of 69.8 dB. The simulated input referred noise is 5.3 mu V over 0.1 Hz to 20 kHz. Copyright (c) 2012 John Wiley & Sons, Ltd.

引用

页码：437 / 451

页数：15

共 50 条

[21] A Low-Power Low-Noise Bioamplifier for Multielectrode Neural Recording Systems
Quadir, Md Shahed Enamul
Haider, Mohammad Rafiqul
Massoud, Yehia
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012, : 2557 - 2560
[22] A Low-power Low-noise Reconfigurable Bandwidth BiCMOS Neural Amplifier
Tasneem, Nishat T.
Mahbub, Ifana
PROCEEDINGS OF THE 2018 IEEE 13TH DALLAS CIRCUITS AND SYSTEMS CONFERENCE (DCAS), 2018,
[23] A Low-power Low-noise Open-loop Configured Signal Folding Neural Recording Amplifier
Punekar, Gauri
Gonuguntla, Venkateswarlu
Yellappa, Palagani
Choi, Jun Rim
Vaddi, Ramesh
2018 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2018, : 99 - 100
[24] A low-power low-noise neural recording amplifier with an improved recycling telescopic-cascode OTA
Mohtashamnia, Mohammadamin
Yavari, Mohammad
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2022, 154
[25] A Low-Noise High Input Impedance Analog Front-End Design for Neural Recording Implant
Hai Au Huynh
Ronchini, Margherita
Rashidi, Amin
Tohidi, Mohammad
Farkhani, Hooman
Moradi, Farshad
2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2019, : 887 - 890
[26] A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications
Sundarasaradula, Yuwadee
Thanachayanont, Apinunt
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2018, 27 (07)
[27] A Programmable Low-Power, Low-Noise Front-End Channel in 0.35-μm CMOS for CdZnTe detectors
Diba, Milad
Beilouni, Ahmad
Kalemci, Emrah
Bozkurt, Ayhan
2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
[28] Low-power low-noise 8-channel EEG front-end ASIC for ambulatory acquisition systems
Yazicioglu, Refet Firat
Merken, Patrick
Puers, Robert
Van Hoof, Chris
ESSCIRC 2006: PROCEEDINGS OF THE 32ND EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2006, : 247 - +
[29] A Dual-Mode, Low-Power and Low-Noise 0.18μm CMOS Front-End for Optical Biosensors
Trabelsi, A.
Boukadoum, M.
Siaj, M.
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012, : 2405 - 2408
[30] A low-noise front-end for multiplexed ENG recording using CMOS technology
Taylor, John
Rieger, Robert
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2011, 68 (02) : 163 - 174

← 1 2 3 4 5 →