共 50 条
- [22] Triple Patterning Lithography (TPL) Layout Decomposition using End-Cutting DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION VII, 2013, 8684
- [23] LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout Decomposition 2023 60TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC, 2023,
- [24] WIPAL: Window-based Parallel Layout Decomposition in Double Patterning Lithography 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 937 - 940
- [25] Layout Decomposition for Hybrid E-Beam and DSA Double Patterning Lithography 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 2461 - 2464
- [26] SUALD: Spacing Uniformity-Aware Layout Decomposition in Triple Patterning Lithography PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, : 566 - 571
- [27] Layout Optimizations for Double Patterning Lithography 2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 726 - 729
- [28] A Novel Methodology for Triple/Multiple-Patterning Layout Decomposition DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION VI, 2012, 8327
- [29] A Layout Decomposition Algorithm for Self-Aligned Multiple Patterning DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION FOR MANUFACTURABILITY VIII, 2014, 9053
- [30] SOI Layout Decomposition for Double Patterning Lithography on High-Performance Computer Platforms INTERNATIONAL CONFERENCE ON MICRO- AND NANO-ELECTRONICS 2014, 2014, 9440