Pentacene thin-film transistors and inverters with dual-gate structure

被引:8
|
作者
Koo, Jae Bon [1 ]
Lim, Jung Wook
Kim, Seong Hyun
Ku, Chan Hoe
Lim, Sang Chul
Lee, Jung Hun
Yun, Sun Jin
Yang, Yong Suk
机构
[1] Elect & Telecommun Res Inst, IT Convergence & Components Lab, Taejon 305700, South Korea
[2] Kyung Hee Univ, Informat Display Dept, Seoul, South Korea
关键词
D O I
10.1149/1.2335942
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
We report on the fabrication of dual-gate organic thin-film transistors using plasma-enhanced atomic layer deposited 150 nm thick Al2O3 and 300 nm thick parylene as gate dielectrics and pentacene as a semiconductor. The threshold voltage (V-th) is changed from 14.5 to -1.5 V when the voltage bias of the top-gate electrode is changed from -10 to 20 V. The voltage transfer characteristics of an inverter with a dual-gate driver transistor and a single-gate load transistor, specifically, swing range and inversion voltage, have been artificially controlled by changing the voltage bias of the top-gate electrode. (c) 2006 The Electrochemical Society.
引用
收藏
页码:G320 / G322
页数:3
相关论文
共 50 条
  • [21] Dual-gate polycrystalline silicon thin-film transistors with intermediate lightly doped region
    Chung, Hoon-Ju
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2006, 45 (8A): : 6182 - 6185
  • [22] A Comparative Study on Inverters Built With Dual-Gate Thin-Film Transistors Based on Depletion- or Enhancement-Mode Technologies
    Lei, Tengteng
    Shi, Runxiao
    Wang, Yuqi
    Xia, Zhihe
    Wong, Man
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (06) : 3186 - 3191
  • [23] Impact of Variant Gate Insulator Fabrication Process on Reliability of Dual-Gate InGaZnO Thin-Film Transistors
    Chien, Ya-Ting
    Zhou, Kuan-Ju
    Tai, Mao-Chou
    Chen, Yu-An
    Sun, Pei-Jun
    Lee, Ya-Huan
    Chang, Ting-Chang
    Tsai, Tsung-Ming
    Fan, Yang-Shun
    Huang, Chen-Shuo
    Chen, Kuo-Kuang
    Tsai, Chih-Hung
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 70 (03) : 1089 - 1094
  • [24] Dual-Gate Characteristics of Amorphous InGaZnO4 Thin-Film Transistors as Compared to Those of Hydrogenated Amorphous Silicon Thin-Film Transistors
    Takechi, Kazushige
    Nakata, Mitsuru
    Azuma, Kazufumi
    Yamaguchi, Hirotaka
    Kaneko, Setsuo
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (09) : 2027 - 2033
  • [25] Characterization of Top-Gate Effects in Amorphous InGaZnO4 Thin-Film Transistors Using a Dual-Gate Structure
    Takechi, Kazushige
    Iwamatsu, Shinnosuke
    Yahagi, Toru
    Watanabe, Yoshiyuki
    Kobayashi, Seiya
    Tanabe, Hiroshi
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2012, 51 (10)
  • [26] Dual-gate organic thin film transistors as chemical sensors
    Park, Young Min
    Salleo, Alberto
    APPLIED PHYSICS LETTERS, 2009, 95 (13)
  • [27] Characterization of top-gate effects in amorphous InGaZnO4 thin-film transistors using a dual-gate structure
    Takechi, Kazushige
    Iwamatsu, Shinnosuke
    Yahagi, Toru
    Watanabe, Yoshiyuki
    Kobayashi, Seiya
    Tanabe, Hiroshi
    Japanese Journal of Applied Physics, 2012, 51 (10):
  • [28] Printed dual-gate organic thin film transistors and PMOS inverters on flexible substrates: role of top gate electrode
    Singh, Subhash
    Matsui, Hiroyuki
    Tokito, Shizuo
    JOURNAL OF PHYSICS D-APPLIED PHYSICS, 2022, 55 (13)
  • [29] Pentacene thin-film transistors with thin polymer gate dielectric and silver electrode
    Kim, J. H.
    Song, K. C.
    Beak, K. -H.
    Kim, D. J.
    Do, L. M.
    IDW '07: PROCEEDINGS OF THE 14TH INTERNATIONAL DISPLAY WORKSHOPS, VOLS 1-3, 2007, : 2005 - +
  • [30] Charge Carrier Distribution in Low-Voltage Dual-Gate Organic Thin-Film Transistors
    Shiwaku, Rei
    Tamura, Masataka
    Matsui, Hiroyuki
    Takeda, Yasunori
    Murase, Tomohide
    Tokito, Shizuo
    APPLIED SCIENCES-BASEL, 2018, 8 (08):