FPGA Design of Speech Compression by Using Discrete Wavelet Transform

被引：0

作者：

Pang, J. ^{[1
]}

Chauhan, S. ^{[1
]}

机构：

[1] Calif State Univ Sacramento, Dept Elect & Elect Engn, Sacramento, CA 95826 USA

来源：

WCECS 2008: WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE | 2008年

关键词：

Audio codec; discrete wavelet; FPGA; speech compression;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

This paper presents the Discrete Wavelet Transform (DWT) for real-world speech compression design by using the Field Programmable Gate Array (FPGA) device. Compared with many reports which only focused on the DWT architecture design, this paper gives the speech compression system design detail on how to interface DWT block with SDRAM and audio codec chip. Speech compression was achieved by keeping only the approximation part of the DWT result. The compressed speech signal was read back after upsampling was performed. The resulting compressed speech can be heard clearly with some introduced background noise Future work is to reduce noise.

引用

页码：151 / 156

页数：6

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