Ultra low noise low power LDO design

被引:0
|
作者
Mannama, Vello
Sabolotny, Rein
Strik, Viktor
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low dropout regulator (LDO) with ultra low output noise is described. The proposed structure of LDO with internal noise filter is discussed and related design problems along with their possible solutions are highlighted. The LDO ensures output noise below 10uV (10M to 100 kHz) having quiescent current about 25uA for no load. Maximum output current of 100mA is available. The LDO is stable with a 220nF ceramic output capacitor. In testing, PSRR above 75dB (1ktHz), dropout below 80 mV (Vout>2.5V), and transient peaks below 30mV (1 mA ... 80mA output step) were measured. The solution is patent pending and has been introduced to low noise LDO LP5900.
引用
收藏
页码:115 / 118
页数:4
相关论文
共 50 条
  • [21] NOISE AWARE FULLY INTEGRATED LOW POWER AND LOW INRUSH CURRENT FAST TRANSIENT RESPONSE LDO
    Avanija, Y.
    Reddy, K. Suresh
    INTERNATIONAL JOURNAL OF MARITIME ENGINEERING, 2024, 1 : A41 - A50
  • [22] Design of LDO Linear Regulator with Ultra Low-Output Impedance Buffer
    Choi, Jungsu
    Park, Jungeui
    Jeong, Wooju
    Lee, Junsang
    Lee, Seok
    Yoon, Jayang
    Kim, Jaehoon
    Choi, Joongho
    2009 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2009), 2009, : 420 - 423
  • [23] Design and Analysis of Low-Power Protection Circuits for LDO Regulators
    Deb, Arnab
    Selvakumar, David
    Mervin, J.
    Ghosh, Anurupa
    EMERGING VLSI DEVICES, CIRCUITS AND ARCHITECTURES, VDAT 2023, 2025, 1234 : 197 - 213
  • [24] A 2.4 GHz CMOS Ultra Low Power Low Noise Amplifler Design with 65 nm CMOS Technology
    Koo, MinSuk
    Jung, Hakchul
    Song, Ickhyun
    Jhon, Hee-Sauk
    Shin, Hyungcheol
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 1480 - 1483
  • [25] Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO
    吴秀山
    王志功
    李智群
    夏峻
    李青
    半导体学报, 2010, 31 (08) : 137 - 140
  • [26] Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO
    Wu Xiushan
    Wang Zhigong
    Li Zhiqun
    Xia Jun
    Li Qing
    JOURNAL OF SEMICONDUCTORS, 2010, 31 (08)
  • [27] Design of an Ultra Wideband Low Noise Amplifier(LNA) Circuit with High Center Frequency and Low Power Consumption
    Chowdhury, Md. Asif Mahmood
    Chowdhury, Prasenjit
    2013 THIRD INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING & COMMUNICATION TECHNOLOGIES (ACCT 2013), 2013, : 316 - 319
  • [28] Design of Ultra-Low Noise and Low Temperature Usable Power System for High-Precision Detectors
    Zhang, Hong-Fei
    Wang, Jian-Min
    Tang, Qi-Jie
    Feng, Yi
    Yang, Dong-Xu
    Chen, Jie
    Lin, Sheng-Zhao
    Wang, Jian
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2016, 63 (06) : 2757 - 2763
  • [29] Design and analysis of low power low phase noise VCO
    Dudulwar, P.
    Shah, K.
    Le, H.
    Singh, J.
    PROCEEDINGS OF THE INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2006, : 256 - +
  • [30] Self Compensating Low Noise Low Power PLL design
    Melikyan, Vazgen
    Durgaryan, Armen
    Khachatryan, Ararat
    Hayk, Manukyan
    Musaelyan, Eduard
    PROCEEDINGS OF IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2013), 2013,