Distributed Arithmetic Architecture of Discrete Wavelet Transform (DWT) with Hybrid Method

被引：0

作者：

Ja'afar, Noor Huda ^{[1
]}

Ahmad, Afandi ^{[2
]}

Amira, Abbes ^{[3
]}

机构：

[1] Univ Tun Hussein Onn Malaysia, Design Res Lab, VLSI Architecture & Syst, POB 101, Batu Pahat 86400, Johor, Malaysia

[2] Univ Tun Hussein Onn Malaysia, Fac Elect Elect, Dept Comp Engn, Batu Paha 86400, Johor, Malaysia

[3] Univ West Scotland, Sch Comp, Paisley, Renfrew, Scotland

来源：

2013 IEEE 20TH INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS) | 2013年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the design and implementation of distributed arithmetic (DA) architectures of three-dimensional (3-D) Discrete Wavelet Transform (DWT) with hybrid method for medical image compression. Due to the separability property of the multi-dimensional Haar and Daubechies, the proposed architecture has been implemented using a cascade of three N-point one-dimensional (1-D) Haar/Daubechies and two transpose memories for a 3-D volume of NxNxN, suitable for 3-D medical imaging applications. The architectures were synthesised using VHDL and G-code and implemented on field programmable gate array (FPGA) single board RIO (sbRIO-9632) with Spartan-3 (XC3S2000). Experimental results and an analysis of the area, power consumption, maximum frequency, latency, throughput as well as the subjective test are discussed in this paper.

引用

页码：501 / 507

页数：7

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