A low-voltage mixed-mode CMOS/SOI integrated circuit for 13.56 MHz RFID applications

被引：0
|
作者：
Villard, P [1 ]
Bour, C [1 ]
Dallard, E [1 ]
Lattard, D [1 ]
de Pontcharra, J [1 ]
Robert, G [1 ]
Roux, S [1 ]
机构：
[1] CEA Grenoble, LETI, F-38054 Grenoble 9, France
来源：
2002 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A low-voltage mixed-mode CMOS/SOI integrated circuit for 13.56 MHz RFID applications is presented. When connected to an external inductive loop antenna and put in a reader magnetic field, the chip is remote powered. Nominal supply voltage lowering down to 1.2 V (digital part) and 1.5 V (analog part) was achieved using a 0.25 mum partially-depleted CMOS/SOI technology. Device level simulations were done with the LETISOI model. Measurements proved the chip functionality and the suitability of the technology for lower voltages. To our knowledge, it is the first mixed-mode CMOS/SOI chip dedicated to RFID.
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收藏
页码：163 / 164
页数：2
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