共 50 条
- [32] On using lossless compression of debug data in embedded logic analysis 2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 495 - 504
- [33] SOC and multicore debug: Are design for debug (DFD) features that are put in re-use cores sufficient for silicon debug? 2006 IEEE International Test Conference, Vols 1 and 2, 2006, : 1083 - 1083
- [34] How can the results of silicon debug justify the investment in design-for-debug infrastructure? 2007 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2007, : 1026 - 1026
- [36] Silicon measurement, Debug & Root Cause Analysis for Crystal Oscillator Jitter degradation Proceedings of the 25th Electronics Packaging Technology Conference, EPTC 2023, 2023,
- [37] SoC and Multi-Core Debug: Are Design for Debug (DFD) features that are put in reuse cores sufficient for Silicon Debug? 2006 IEEE International Test Conference, Vols 1 and 2, 2006, : 1080 - 1081
- [38] SOC and Multi-Core Debug: Are Design for Debug (DFD) features that are put in reuse cores sufficient for Silicon Debug? 2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2006, : 1084 - 1084
- [39] Enhancing Silicon Debug via Periodic Monitoring 23RD IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT-TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2008, : 125 - 133