Main memory energy optimization for multi-task applications

In order to minimize the energy consumed by the main memory in embedded systems, several solutions are proposed. An architectural solution is particularly effective in reducing this memory consumption part. It consists of multibanking the addressing space instead of a monolithic memory. The main advantage in this approach is the capability of independently setting banks in low power modes when they are not accessed, such that only the accessed bank is maintained in active mode. In this paper we investigate how this power management capability built into modern DRAM devices can be handled for real-time and multitasking applications. We aim to find, at system level design, both an efficient allocation of application's tasks to memory banks, and the memory configuration that lessen the energy consumption: number of banks and the size of each bank. Experiments show an energy savings of 15% for the considered two benchmarks.