ESD-induced circuit performance degradation in RFICs

被引:0
|
作者
Gong, K [1 ]
Feng, HG [1 ]
Zhan, RY [1 ]
Wang, AZ [1 ]
机构
[1] IIT, Dept Elect & Comp Engn, Integrated Elect Lab, Chicago, IL 60616 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
ESD structures have inevitable parasitic impacts on circuit performance. This paper reports results of an investigation into ESD-induced circuit performance degradation in RFICs including clock corruption, reduced slew rate, narrowed bandwidth, and noise generation. Performance degradation of similar to 80%, similar to 30% & similar to5% were observed in clock, Op Amp and LNA circuits studied, which were recovered substantially by using novel compact ESD structures that are critical to reducing ESD-to-circuit influences while maintaining adequate ESD performance. (C) 2001 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1379 / 1383
页数:5
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