Hierarchical identification of untestable faults in sequential circuits

被引:0
|
作者
Raik, Jaan [1 ]
Ubar, Raimund [1 ]
Krivenko, Anna [1 ]
Kruus, Margus [1 ]
机构
[1] Tallinn Univ Technol, Dept Comp Engn, Tallinn, Estonia
关键词
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暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability identification operate at the logic-level and, thus, the methods do not scale. Current paper points out a new class of sequentially untestable faults, called register input logic stuck-on faults. We show that it is possible to identify such faults from the register-transfer level (RTL) description of the circuit. Moreover, we prove by experiments that the considered faults form a large subclass of all the untested faults.
引用
收藏
页码:668 / 671
页数:4
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