An ultra low power, low voltage tailless QFG based differential amplifier with High CMRR, rail to rail operation and enhanced slew rate

被引:13
|
作者
Safari, Leila [1 ]
Azhari, Seyed Javad [1 ]
机构
[1] Iran Univ Sci & Technol, Elect & Elect Engn Fac, Elect Res Ctr, Narmak, Iran
关键词
High CMRR; Ultra low power; Low voltage; Rail to rail; High slew rate; Tailless differential amplifier; INPUT;
D O I
10.1007/s10470-010-9555-8
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper proposes a novel tailless ultra low power low voltage high CMRR differential amplifier (D.A.) with rail-to-rail input common mode range (ICMR) based on quasi floating gate (QFG) transistors. For low voltage operation, the tail current source of the conventional D.A. is removed and the resulted lack of CMRR is highly compensated by means of two simple inverters. The required supply voltage is only VGS + VDSsat (with their usual meanings of symbols) which is one VDSsat lower than the required supply voltage for the conventional D.A. Unlike the conventional differential amplifier, slew rate (SR) in the proposed one is not limited by the tail current source and is determined by the amplitude of input signals. The principle of operation, small signal analysis and the formula of the most important parameters of the proposed D.A. are presented. HSPICE simulation results using TSMC 0.18 mu m CMOS process parameters and +/- 0.4 V supply voltage are presented which verify the high performance of the proposed scheme. The simulation results show a rail-to-rail operation and 121 dB CMRR for the proposed tailless differential amplifier. The corner case simulation results are also provided which show a robust performance for the proposed structure. Its unity gain bandwidth product is 72.3 MHz that is 2.31 times larger than that of conventional differential amplifier. Positive and negative SRs are improved by a factor of 7.4 and 3.58 times respectively compared to conventional one. It has also an ultra low power dissipation of 6.89 mu W.
引用
收藏
页码:241 / 252
页数:12
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