High temperature barrier electrode technology for high density ferroelectric memories with stacked capacitor structure

被引:12
|
作者
Onishi, S [1 ]
Nagata, M
Mitarai, S
Ito, Y
Kudo, J
Sakiyama, K
Desu, SB
Bhatt, HD
Vijay, DP
Hwang, Y
机构
[1] Sharp Corp, IC Grp, VLSI Dev Labs, Nara 632, Japan
[2] Virginia Polytech Inst & State Univ, Dept Mat Sci & Engn, Blacksburg, VA 24061 USA
关键词
D O I
10.1149/1.1838680
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
This paper describes the novel stacked electrode structure, PtRhOx/PtRh/PtRhOx applicable to stacked memory cells in advanced ferroelectric memories. This structure acts as a stable bottom electrode and a barrier on a polysilicon plug up to 700 degrees C and a stable contact resistance of 1.5 K Ohm is obtained at the contact size of 0.6 mu m. In addition to the low leakage current of lead zirconate titanate [PZT, Pb(Zr0.52Ti0.48)O-3] capacitor (10(-8) A/cm(2) at 3 V), degradation properties of fatigue and imprint are improved compared with conventional Pt electrodes. The decrease of the switched charge is restricted to less than 10% after the fatigue cycle of 10(11). These results indicate its promise as a barrier electrode structure for advanced ferroelectric memory integration.
引用
收藏
页码:2563 / 2568
页数:6
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