A Scheduling Algorithm in the Randomly Heterogeneous Multi-Core Processor

The increasing scale of multi-core processors are likely to be randomly heterogeneous by design or because of diversity and flaws. The latter type of heterogeneity introduced by some unforeseen variable factors such as the manufacturing process variation is especially challenging because of its unpredictability. In this environment, thread scheduler and global power manager must handle such randomly heterogeneous. Furthermore, these algorithms must supply high efficiency, scalability and low overhead because future multi-core processors may have a number of cores on a single die. This paper presents a variationaware scheduling algorithm for application scheduling and power management. Thread switching and sampling among different cores in the multi-core processor introduce obvious overhead than previous many-core scheduling algorithms. Proposed scheme records the information of swapped thread of preferential core and uses tabu search-based randomly heterogeneous scheduling algorithm(TSR) to avoid the occurrence of repeated sampling and reduce the migration frequency and sampling frequency of a thread. The experimental results show that TSR algorithm has decreased 45.7% of thread migration and 42.2% of the sampling time as compared with local search algorithm. This paper regards the transcendental Hungarian offline scheduling algorithm as the baseline. ED2 of TSR only decrease by 8.58% as compared with that of Hungarian offline scheduling algorithm, but compared with the random search scheduling algorithm, ED2 of TSR decreased by 39.4%.