A Programmable and FPGA-accelerated GTP Offloading Engine for Mobile Edge Computing in 5G Networks

被引：0

作者：

Shen, Chung-An ^{[1
]}

Lee, Ding-Yuan ^{[2
,3
]}

Ku, Chung-An ^{[1
]}

Lin, Meng-Wei ^{[1
]}

Lu, Kuo-Cheng ^{[4
]}

Tan, Shao-Yu ^{[4
]}

机构：

[1] Natl Taiwan Univ Sci & Technol, Taipei, Taiwan

[2] Natl Taiwan Univ, Taipei, Taiwan

[3] Jetnetech Inc, San Francisco, CA USA

[4] Realtek Inc, Milpitas, CA USA

来源：

IEEE CONFERENCE ON COMPUTER COMMUNICATIONS WORKSHOPS (IEEE INFOCOM 2019 WKSHPS) | 2019年

关键词：

D O I：

10.1109/infcomw.2019.8845143

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This poster presents a programmable and FPG-Aaccelerated packet processing engine, performing the encapsulation and decapsulation of GPRS Tunneling Protocol (GTP) packets, for Mobile Edge Computing in 5G Networks. The proposed engine is designed by using the P4 language and is implemented to the FPGA platform by using the Xilinx SDNet tool. The implemented system is practically realized on the Xilinx FPGA platform and the detailed architecture is presented. The experimental results show that targeted throughput of 10Gbps per port is achieved given the packet-processing latency of 5 mu s.

引用

页码：1021 / 1022

页数：2

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