Real-time defogging hardware accelerator based on improved dark channel prior and adaptive guided filtering

Image defogging has important application value in preprocessing technology and computer vision system. Dark channel prior (DCP) is simple and effective in many defogging algorithms, but the time-consuming sorting comparison and a large number of calculation refinement processes limit its real-time processing capabilities. For real-time applications, we proposed a hardware architecture for single-image defogging, which gives full play to hardware parallel processing capability and algorithmic parallelism. First, an average statistical approach is used to estimate atmospheric light. Then, the refined dark channel map is used for transmittance estimation to reduce the blocking effect. The transmittance is linearly corrected to prevent color distortion in outdoor scenes containing sky areas. Finally, a guided filter algorithm is introduced in the transmittance refinement, and its fast mean filter uses an adaptive window to process the image boundary. The hardware implementation of the proposed method uses field programmable gate array device is Zynq-7000. Experimental results show that our design obtains good performance with low-complex hardware implementation and shorter execution time. It only takes 7.43 ms to process a 1280 x 720 image, and the frame rate can reach 135 fps at a clock rate of 125 MHz, which can be used as a real-time hardware accelerator for image processing. (C) 2022 SPIE and IS&T