Using genetic algorithm for slicing floorplan area optimization in circuit design

被引:0
|
作者
Mani, N
Srinivasan, B
机构
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The paper describes a combined genetic algorithm and slicing approach for floorplan area optimization. This approach helps the designer to explore the floorplan issues during the early stage of integrated circuit design. The slicing tree representation provides an efficient tree traversal operations using recursion for obtaining area-efficient floorplans. Also, the slicing floorplan approach reduces the complexity of the resulting floorplan at the routing stage by eliminating the cyclic conflicts.
引用
收藏
页码:2888 / 2892
页数:5
相关论文
共 50 条
  • [41] Optimization design of a linear actuator using a genetic algorithm
    Maridor, Joel
    Markovic, Miroslav
    Perriard, Yves
    Ladas, Dimitrios
    2009 IEEE INTERNATIONAL ELECTRIC MACHINES & DRIVES CONFERENCE, VOLS 1-3, 2009, : 1770 - +
  • [42] A genetic algorithm without parameters tuning and its application on the floorplan design problem
    Someya, H
    Yamamura, M
    GECCO-99: PROCEEDINGS OF THE GENETIC AND EVOLUTIONARY COMPUTATION CONFERENCE, 1999, : 620 - 627
  • [43] Reversible Logic Circuit Synthesis and Optimization using Adaptive Genetic Algorithm
    Sasamal, Trailokya Nath
    Singh, Ashutosh Kumar
    Mohan, Anand
    PROCEEDINGS OF THE 4TH INTERNATIONAL CONFERENCE ON ECO-FRIENDLY COMPUTING AND COMMUNICATION SYSTEMS, 2015, 70 : 407 - 413
  • [44] AN ANALYTICAL APPROACH TO FLOORPLAN DESIGN AND OPTIMIZATION
    SUTANTHAVIBUL, S
    SHRAGOWITZ, E
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1991, 10 (06) : 761 - 769
  • [45] Slicing floorplan using BDD-based constraint solver
    Chun-Chen, Liu
    Journal of Applied Sciences, 2006, 6 (02) : 297 - 302
  • [46] A novel incremental algorithm for non-slicing floorplan with low time complexity
    Yang, L
    Dong, SQ
    Hong, XL
    Ma, YC
    Proceedings of the 8th Joint Conference on Information Sciences, Vols 1-3, 2005, : 241 - 244
  • [47] Layout Optimization Method for Magnetic Circuit Using Multistep Utilization of Genetic Algorithm Combined with Design Space Reduction
    Okamoto, Yoshifumi
    Tominaga, Yusuke
    Sato, Shuji
    ELECTRICAL ENGINEERING IN JAPAN, 2012, 181 (03) : 19 - 30
  • [48] A delay line circuit design for crosstalk minimization using genetic algorithm
    Chung, Chaeho
    Lee, Soobum
    Kwak, Byung Man
    Kim, Gawon
    Kim, Joungho
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2008, 27 (03) : 578 - 583
  • [49] Delay line circuit design for crosstalk minimization using genetic algorithm
    Chung, Chaeho
    Lee, Soobuni
    Kwak, Byung Man
    Kim, Gawon
    Kim, Joungho
    CJK-OSM 4: The Fourth China-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems, 2006, : 551 - 556
  • [50] A hybrid genetic algorithn for the floorplan optimization problem
    Tseng, LY
    Han, TY
    ISSCS 2005: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS, 2005, : 781 - 784