Using genetic algorithm for slicing floorplan area optimization in circuit design

被引:0
|
作者
Mani, N
Srinivasan, B
机构
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The paper describes a combined genetic algorithm and slicing approach for floorplan area optimization. This approach helps the designer to explore the floorplan issues during the early stage of integrated circuit design. The slicing tree representation provides an efficient tree traversal operations using recursion for obtaining area-efficient floorplans. Also, the slicing floorplan approach reduces the complexity of the resulting floorplan at the routing stage by eliminating the cyclic conflicts.
引用
收藏
页码:2888 / 2892
页数:5
相关论文
共 50 条
  • [1] An efficient genetic algorithm for slicing floorplan area optimization
    Lin, CT
    Chen, DS
    Wang, YW
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS, 2002, : 879 - 882
  • [2] GALLO: A genetic algorithm for floorplan area optimization
    Rebaudengo, M
    Reorda, MS
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996, 15 (08) : 943 - 951
  • [3] A parallel genetic algorithm for floorplan area optimization
    Tang, Maolin
    Lau, Raymond Y. K.
    PROCEEDINGS OF THE 7TH INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS DESIGN AND APPLICATIONS, 2007, : 801 - +
  • [4] Improved genetic algorithm for VLSI floorplan design with non-slicing structure
    Kimura, Yosuke
    Ida, Kenichi
    COMPUTERS & INDUSTRIAL ENGINEERING, 2006, 50 (04) : 528 - 540
  • [5] Floorplan design using improved Genetic Algorithm
    Ida, K
    Kimura, Y
    FOUNDATIONS OF INTELLIGENT SYSTEMS, 2003, 2871 : 531 - 538
  • [6] Floorplan design problem using improved genetic algorithm
    Yosuke Kimura
    Kenichi Ida
    Artificial Life and Robotics, 2004, 8 (2) : 123 - 126
  • [7] A New Approach for Circuit Design Optimization using Genetic Algorithm
    Bao, Zhiguo
    Watanabe, Takahiro
    ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3, 2008, : 383 - 386
  • [8] Circuit Design Optimization Using Genetic Algorithm with Parameterized Uniform Crossover
    Bao, Zhiguo
    Watanabe, Takahiro
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2010, E93A (01) : 281 - 290
  • [9] On accelerating slicing floorplan design with boundary constraints
    Liu, EC
    Lin, TH
    Wang, TC
    ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL III: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 399 - 402
  • [10] Optimization of Cell-based VLSI Circuit Design using a Genetic Algorithm: Design Approach
    Wankhede, Manisha V.
    Deshmukh, Amol Y.
    IMECS 2009: INTERNATIONAL MULTI-CONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS, VOLS I AND II, 2009, : 1599 - +