Runtime reconfigurable routing

被引:0
|
作者
Brebner, G [1 ]
Donlin, A [1 ]
机构
[1] Univ Edinburgh, Dept Comp Sci, Edinburgh EH9 3JZ, Midlothian, Scotland
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暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper is concerned with practicable solutions to a dynamic circuit reconfiguration problem: how to perform runtime routing of data between blocks of circuitry. The solutions use a 'virtual circuitry' approach based on the notion of Swappable Logic Units (SLUs). They involve a continuum of three types of routing model in which communication channels are made available using some form of extra configured logic supplied by an operating system. These models involve trade-offs between flexibility, speed and cell count; however, all stop short of any impractical attempt at arbitrary routing at run time. The models also illustrate a blurring of traditional notions of 'hardware' and 'software', at a point where circuitry meets instruction sequences.
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页码:25 / 30
页数:6
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