共 50 条
- [1] Validated 90nm CMOS technology platform with low-k copper interconnects for advanced system-on-chip (SoC) PROCEEDING OF THE 2002 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING, 2002, : 157 - 162
- [2] Integration of MIM capacitors with Low-k/Cu process for 90nm analog circuit applications PROCEEDINGS OF THE IEEE 2003 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2003, : 183 - 185
- [3] A 90nm dual damascene hybrid (organic/inorganic) low-k - Copper BEOL integration scheme ADVANCED METALLIZATION CONFERENCE 2003 (AMC 2003), 2004, : 85 - 89
- [4] A manufacturable Copper/low-k SiOC/SiCN process technology for 90nm-node high performance eDRAM PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2002, : 15 - 17
- [5] Design and Verification of nMOSFET for Low Leakage at 90nm Process Technology 2013 INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS AND NETWORK TECHNOLOGIES (CSNT 2013), 2013, : 732 - 735
- [6] Reliability improvement of 90nm large flip chip low-k die via dicing and assembly process optimization EPTC 2006: 8TH ELECTRONIC PACKAGING TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2006, : 622 - 626
- [7] Integration of Cu-CMP process with combination of abrasive-free copper polishing and low selective barrier polishing for 90nm Cu/low-k interconnect ADVANCED METALLIZATION CONFERENCE 2004 (AMC 2004), 2004, : 571 - 576
- [8] Reliability evaluation of BOAC and normal pad stacked-chip packaging using 90nm low-K wafers 2006 INTERNATIONAL CONFERENCE ON ELECTRONIC MATERIALS AND PACKAGING, VOLS 1-3, 2006, : 150 - +
- [9] New approach of 90nm low-k interconnect evaluation using a voltage ramp dielectric breakdown (VRDB) test 2005 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 43RD ANNUAL, 2005, : 483 - 489
- [10] 90nm technology SRAM soft fail analysis using nanoprobing and junction stain TEM ISTFA 2006, 2006, : 512 - +