Runtime Power Estimator Calibration for High-Performance Microprocessors

被引:0
|
作者
Wang, Hai [1 ]
Tan, Sheldon X. -D. [1 ]
Liu, Xue-Xin [1 ]
Gupta, Ashish [2 ]
机构
[1] Univ Calif Riverside, Dept Elect Engn, Riverside, CA 92521 USA
[2] Intel Corp, Chandler, AZ 85226 USA
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Accurate runtime power estimation is important for on-line therma/power regulation on today's high performance processors. In this paper, we introduce a power calibration approach with the assistance of on-chip physical thermal sensors. It is based on a new error compensation method which corrects the errors of power estimations using the feedback from physical thermal sensors. To deal with the problem of limited number of physical thermal sensors, we propose a statistical power correlation extraction method to estimate powers for places without thermal sensors. Experimental results on standard SPEC benchmarks show the new method successfully calibrates the power estimator with very low overhead introduced.
引用
收藏
页码:352 / 357
页数:6
相关论文
共 50 条
  • [1] Reducing power in high-performance microprocessors
    Tiwari, V
    Singh, D
    Rajgopal, S
    Mehta, G
    Patel, R
    Baez, F
    1998 DESIGN AUTOMATION CONFERENCE, PROCEEDINGS, 1998, : 732 - 737
  • [2] Power Management and Delivery for High-Performance Microprocessors
    Karnik, Tanay
    Pant, Mondira
    Borkar, Shekhar
    2013 50TH ACM / EDAC / IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2013,
  • [3] Modeling of power distribution systems for high-performance microprocessors
    Herrell, DJ
    Beker, B
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 1999, 22 (03): : 240 - 248
  • [4] High-performance RISC microprocessors
    Choquette, J
    Gupta, M
    McCarthy, D
    Veenstra, J
    IEEE MICRO, 1999, 19 (04) : 48 - 55
  • [5] Power-efficient value speculation for high-performance microprocessors
    Moreno, R
    Pinuel, L
    del Pino, S
    Tirado, F
    PROCEEDINGS OF THE 26TH EUROMICRO CONFERENCE, VOLS I AND II, 2000, : 292 - 299
  • [6] 3D power delivery for microprocessors and high-performance ASICs
    Sun, Jian
    Lu, Jian-Qiang
    Giuliano, David
    Chow, T. Paul
    Gutmann, Ronald J.
    APEC 2007: TWENTY-SECOND ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1 AND 2, 2007, : 127 - +
  • [7] Tradeoffs in modeling the response of power delivery systems of high-performance microprocessors
    Advanced Micro Devices Inc, Austin, United States
    IEEE Topical Meeting on Electrical Performance of Electronic Packaging, 2000, : 77 - 80
  • [8] Special issue on High-Performance and Low-Power Microprocessors - Foreword
    Iwamura, J
    IEICE TRANSACTIONS ON ELECTRONICS, 2002, E85C (02) : 233 - 234
  • [9] Tradeoffs in modeling the response of power delivery systems of high-performance microprocessors
    Beker, B
    Hirsch, T
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2000, : 77 - 80
  • [10] A clock methodology for high-performance microprocessors
    Carrig, KM
    Chu, AM
    Ferraiolo, FD
    Petrovick, JG
    Scott, PA
    Weiss, RJ
    PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, : 119 - 122